In the related patent application, filed by the applicant on the same day as the present patent application, and entitled "LOW-NOISE VERTICAL BIPOLAR TRANSISTOR AND CORRESPONDING FABRICATION PROCESS", U.S. Patent Application Ser. No. 09/323,418 filed on Jun. 1, 1999, U.S. Pat. No. 6,177,717, a method is described for producing a vertical bipolar transistor with a silicon/germanium heterojunction base and epitaxial emitter on the upper surface of this base. As described in this patent application, the production of the base includes nonselective epitaxy of a stack of layers of silicon and silicon-germanium in a window, referred to as the "base window", made on the surface of the intrinsic collector, as well as on the two parts of an amorphous-silicon protective layer which are arranged on sides of the base window.
Before carrying out this nonselective epitaxy, chemical deoxidation of the base window is carried out, followed by a treatment under hydrogen at a temperature in excess of 600.degree. C. for desorbing the residual components which may remain following the chemical deoxidation. However, during this desorption treatment the amorphous silicon converts into polysilicon, which leads to larger grains being obtained. This finally results in an increase in the roughness of the upper surface of the stack of epitaxial layers within which the base will be produced, which may be a problem in certain applications. This is because excessive roughness may pose problems in aligning the emitter window, as well as for the photolithography phases of the subsequent layers.
Furthermore, an excessive level difference between the peaks and troughs formed on the upper surface of the base may lead to implantation non-uniformities of the extrinsic base as well as to a silicide, deposited on the base, which is rougher and therefore more resistive. Consequently, this leads to an increase in the base-access resistance.